ASICLAND Showcases Customizable SoC Platforms at SEDEX 2025
▶ Highlights Three Core Semiconductor Technologies for Next-Generation Design, Verification, and Packaging
▶ Demonstrates Integrated ASIC Solutions Optimized for Diverse Customer Requirements
▲ Asicland's booth at SEDEX 2025
▲ Visitors gathered around Asicland's booth
[2025-10-22] ASICLAND Co., Ltd. (KOSDAQ: 445090), a leading provider of ASIC (Application-Specific Integrated Circuit) design solutions, announced today that it is participating in “SEDEX 2025,” Korea’s largest semiconductor exhibition, to unveil three core next-generation semiconductor technologies that support an end-to-end development process—from design and verification to advanced packaging—tailored to each customer’s needs.
Hosted by the Korea Semiconductor Industry Association (KSIA), SEDEX 2025 is taking place from October 22–24 at COEX, Seoul, featuring companies across the entire semiconductor ecosystem, including memory, system semiconductors, equipment, and materials.
At this year’s exhibition, ASICLAND is presenting:
- ASICLAND AxHub™ Platform
- High-Performance SoC Platform
- ASICLAND Chiplet Platform
and offering on-site consultations on architecture design and customized packaging optimized for specific customer requirements.
Developed with ASICLAND’s proprietary technology, the AxHub™ Platform accelerates custom ASIC development from the PoC (Proof-of-Concept) stage to packaging by leveraging pre-verified interface dies. The platform was designed to address key challenges faced by fabless customers, such as rising design complexity, longer development cycles, and high initial validation costs.
The High-Performance SoC Platform applies a 5-nanometer Arm architecture, optimized for AI and HPC (High-Performance Computing) applications that require both performance and stability.
Meanwhile, the Chiplet Platform, based on TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) packaging technology, enables ultra-high-speed and low-power interconnections between HBM and logic dies, offering ideal solutions for customers developing AI, data-center, and cloud systems.
Notably, all three platforms are interoperable and modular, allowing customers to implement tailored solutions efficiently according to their project size and target performance goals.
To enhance visitor engagement, ASICLAND is also hosting various on-site activities, including a Lucky Draw, Time-Attack Giveaway, and an AI Photo Booth.
“SEDEX 2025 serves as an opportunity to demonstrate our innovative capabilities that seamlessly reflect customer needs across design to packaging,” said Jong-Min Lee, CEO of ASICLAND. “By strengthening both design flexibility and verification efficiency, we aim to accelerate customer development timelines, improve quality, and further enhance our global competitiveness.”
ASICLAND Showcases Customizable SoC Platforms at SEDEX 2025
▶ Highlights Three Core Semiconductor Technologies for Next-Generation Design, Verification, and Packaging
▶ Demonstrates Integrated ASIC Solutions Optimized for Diverse Customer Requirements
▲ Asicland's booth at SEDEX 2025
▲ Visitors gathered around Asicland's booth
[2025-10-22] ASICLAND Co., Ltd. (KOSDAQ: 445090), a leading provider of ASIC (Application-Specific Integrated Circuit) design solutions, announced today that it is participating in “SEDEX 2025,” Korea’s largest semiconductor exhibition, to unveil three core next-generation semiconductor technologies that support an end-to-end development process—from design and verification to advanced packaging—tailored to each customer’s needs.
Hosted by the Korea Semiconductor Industry Association (KSIA), SEDEX 2025 is taking place from October 22–24 at COEX, Seoul, featuring companies across the entire semiconductor ecosystem, including memory, system semiconductors, equipment, and materials.
At this year’s exhibition, ASICLAND is presenting:
- ASICLAND AxHub™ Platform
- High-Performance SoC Platform
- ASICLAND Chiplet Platform
and offering on-site consultations on architecture design and customized packaging optimized for specific customer requirements.
Developed with ASICLAND’s proprietary technology, the AxHub™ Platform accelerates custom ASIC development from the PoC (Proof-of-Concept) stage to packaging by leveraging pre-verified interface dies. The platform was designed to address key challenges faced by fabless customers, such as rising design complexity, longer development cycles, and high initial validation costs.
The High-Performance SoC Platform applies a 5-nanometer Arm architecture, optimized for AI and HPC (High-Performance Computing) applications that require both performance and stability.
Meanwhile, the Chiplet Platform, based on TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) packaging technology, enables ultra-high-speed and low-power interconnections between HBM and logic dies, offering ideal solutions for customers developing AI, data-center, and cloud systems.
Notably, all three platforms are interoperable and modular, allowing customers to implement tailored solutions efficiently according to their project size and target performance goals.
To enhance visitor engagement, ASICLAND is also hosting various on-site activities, including a Lucky Draw, Time-Attack Giveaway, and an AI Photo Booth.
“SEDEX 2025 serves as an opportunity to demonstrate our innovative capabilities that seamlessly reflect customer needs across design to packaging,” said Jong-Min Lee, CEO of ASICLAND. “By strengthening both design flexibility and verification efficiency, we aim to accelerate customer development timelines, improve quality, and further enhance our global competitiveness.”